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Algorithm guide · arithmetic

QFT half adder

Add two binary registers and keep the overflow as a separate carry-out bit.

Circuit size: 3–7 qubits (n = 1..3)

Before you begin

Draper addition · Carry-out versus low sum bits

Review quantum fundamentals →
Notation used in this lesson
|ψ⟩ and ⟨ψ|
A state vector (ket) and its conjugate transpose (bra). ⟨a|b⟩ is their inner product.
α, β and i
α and β are complex amplitudes; i²=−1. A probability is the squared magnitude |α|².
XOR, · and ⊗
XOR adds bits modulo two. In s·x, multiply corresponding bits and XOR them. ⊗ combines registers or operations on different wires.
U†, Σ and Tr
U† is the adjoint (inverse for a unitary). Σ sums terms. Tr is the matrix trace, the sum of diagonal entries.
Probability, shots and angles
Ideal probabilities describe the model; measured shot frequencies fluctuate. Angles inside trigonometric expressions are in radians unless explicitly labeled turns.

1. The problem

Add two unsigned n-bit numbers and preserve their full n+1-bit sum. This differs from the fixed-width Draper card: overflow is kept on a separate carry-out wire.

2. How it works

Extend the Fourier target with one extra high bit. The same phase-addition idea can now represent values up to 2^(n+1)−1, so the sum of two n-bit inputs fits without wrapping away its carry.

  1. Encode

    Prepare a and b; initialize the carry-out wire to zero.

  2. Extended QFT

    Fourier-transform the target b together with the extra high wire.

  3. Add a

    Apply the controlled phases corresponding to a.

  4. Inverse QFT

    Decode low sum into b and high sum into carry-out, leaving a unchanged.

3. The mathematics, one idea at a time

s=a+b; low=s mod 2ⁿ; carry=⌊s/2ⁿ⌋

The low bits and carry are two parts of one integer sum.

s = 2ⁿ·carry + low

For two n-bit inputs, carry is at most one. There is no incoming carry in this card.

Work this through by hand

4. One-bit 1+1 with carry

Three qubits: one-bit a, one-bit b and one carry wire. This is the smallest supported circuit.

Enter a=1, b=1.

StageCalculation or stateWhat it means
Ordinary addition1+1=2=10₂The answer needs two bits.
Split answercarry=1; low sum=0The extended Fourier target can retain both.
Measured registercarry | low sum | original a = 1|0|1All physical input/result wires are measured in this card.

Expected outcomes for this example

These are ideal predictions for the stated configuration, not a result already measured by your browser. Rows describing alternative modes or combined events are labeled explicitly.

Outcome or eventIdeal probabilityInterpretation
101100% idealRead sum 10 from the left two bits; the last 1 is preserved a.

5. Load the worked example in Composer

The worked example can use smaller or simpler inputs than the gallery defaults. The button below loads the exact circuit used in this lesson.

Bits per input register (n)
1
Input a
1
Input b
1
  1. Save any current circuit you want to keep, then open the worked example. Loading it does not execute a paid hardware job.
  2. Trace the preparation, main operations and measurements against the worked table. Check the gate editor for controls, targets and angles.
  3. Start with an ideal noiseless simulator compatible with the circuit. Mid-circuit measurement, reset and feed-forward require support from the chosen backend.
  4. Inspect the live preview. For a recorded experiment, open Execute, set the available backend options and shots, and Run. Sign in when prompted to retain it in My Jobs.
  5. Read the output as described below before changing one setting and repeating. The guide describes the original example; edits can change the answer.

6. Read the output correctly

The full three-bit label is not the integer sum. Separate carry, low sum and a.

As n increases, the measured layout is carry-out, n low-sum bits, n original-a bits from left to right.

A bit label is a register value; its bar height is a probability or count. For S shots and observed count k, the sampled frequency is k/S. A typical sampling scale for probability p is √[p(1−p)/S]; this is not a strict error bound. Finite samples do not have to match the ideal percentages exactly.

7. Common mistakes & limits

  • Do not confuse this carry-preserving circuit with the modular Draper card.
  • The preserved a bits are input provenance, not additional sum digits.

8. Check your understanding

For one-bit a=1 and b=0, what label do you expect?

Reveal the reasoning

carry=0, low sum=1, a=1, so the joint classical label is 011.

9. Further study

The lesson’s register mappings, supported inputs and loadable example follow Quantket’s implemented circuit. A reference may use different wire names, bit order or resource conventions.

Gallery reference: defaults, definitions & implementation notes

Inputs & default settings

Choose a and b. Composer shows the QFT addition, the n-bit sum, and a distinct carry-out wire.

These are the gallery defaults. The worked example above may override them. Configure the card to change the inputs before loading its editable circuit.

Bits per input register (n)
Default: 2 · Whole number from 1 to 3.
Input a
Default: 01 · 2 bits (0 or 1); leftmost character is the highest-numbered qubit.
Input b
Default: 11 · 2 bits (0 or 1); leftmost character is the highest-numbered qubit.

Implementation notes

The a register is unchanged. The b wires hold the n low bits of a + b; the next wire holds carry-out. All wires are measured, so the classical histogram reads carry-out, then sum bits, then a from left to right. This is the carry-preserving QFT half adder, unlike the fixed-width Draper card where overflow wraps away.

Default example: predictions & circuit facts

These values describe the unedited default setup. They are predictions and circuit properties, not measured results from your saved execution.

Sum
100 (4)
Carry-out
1
Low sum bits
00

Read your saved result

Check the submitted circuit, measured register and execution settings in Run details. Exact results give computed probabilities; sampled results show frequencies from the recorded shots. Edited circuits and noise can change the expected outcome. The algorithm label records the circuit's origin; it does not certify an edited circuit or a measured result.